ACCOMPLISHMENTS: GTE Sylvania (Digital Systems and Bit-Sliced Processor Design)
- Engaged in a variety of high speed digital board level designs – mostly related to radar signal processing. Lots of hands-on prototype board experience with a wire-wrap gun.
- Developed both hardware and software for the central real-time microprocessor based controller for a large automated satellite tracking and data collection system. Traveled to Europe to bring up and deliver the system to the NATO customer.
- Developed a microprocessor software development guidebook for use throughout the company.
- Designed a high performance bit-sliced processor as a replacement for an incumbent ECL based signal processor.
- Took 4-5 graduate level courses at Stanford using the SITN (Stanford Instructional Television Network) with a focus on communications and signal processing.
DETAILS
New Rice BSEE Grad: After graduating from Rice in spring ’78 with a BSEE I had three job offers, one at Motorola in Austin to breadboard the 6809 microprocessor, another at General Dynamics in SoCal to work on the cruise missile guidance system, and anther at GTE Sylvania in Mountain View to work in their Digital Systems Lab. I took a job at GTE, in part because there were some Rice upperclassmen I knew who also went there. GTE was a government/defense contractor and the Digital Systems lab was an outstanding place for a new engineering grad to enter the workforce, receive training and work on advanced complex systems. My annual starting salary at GTE was $17,600. I had no idea what to do with so much money . . .
The Receiver Interface Controller (RIC): One of largest tasks I was assigned while at GTE was to develop the central real-time microprocessor based controller for a large automated satellite tracking and data collection system. It was the first of its type developed by GTE. The RIC controlled a large number of system components including SHF, VHF, and UHF receivers, RF switches, a number of large RF antenna/dishes, and the control of displays on HP workstations that displayed spectral and other data for the operators. Since the target birds were maneuverable (their orbital parameters would change) – the system would receive “mission” parameters from NORAD as to when and where to acquire the satellites. Once acquired the antennas could track using nutation or other techniques. The RIC design involved developing board level interface hardware as well as many thousands of lines of real-time Intel 8080/8085 8-bit microprocessor assembly language code. The photo below shows a younger version of the author with the RIC (Receiver Interface Controller) with the Intel MDS (Microprocessor Development System) ICE (In-Circuit Emulator) connected to the RIC.
The Author with the Receiver Interface Controller (RIC)
The RIC was a 2 Mhz Intel 8080 based system that utilized a lightweight real-time executive developed by the Lab. I was part of the team that traveled to Europe to install and “sell off” the system to the NATO customer, who enthusiastically embraced what then was the most advanced fully automated system of its type. I still remember one of our European hosts gushing “I can’t believe it actually works”.
The RIC was a fantastic learning experience – providing exposure to hard real-time systems design and implementation, assembly language programming, various types of parallel interfaces, serial interfaces, RF equipment (switches, receivers, etc) and systems integration methodologies.
As a result of my work on the RIC, I was asked to develop a guidebook for Microprocessor Software Design for the company, and a photo of the cover of that guide is shown below.
Bit-Sliced Processor Design: Another project I worked on was a replacement for the 10 Mhz PSP-200 (Programmable Signal Processor) “high speed” ECL-based processor used by GTE at the time primarily for radar signal processing. The PSP also included a TRW 16×16 multiplier based addition that could accumulate 35-bit results at a 5 Mhz rate. My proposal was to instead use the new AMD 2903 4-bit bipolar bit sliced parts to achieve better performance, lower power and lower cost , as well as to develop a platform that would be more extensible and maintainable in the future. The processor was designed and boards were fabbed. My takeaway from that experience was that although the 2903 did “more work” per cycle than the processor it was designed to replace, I learned, as Seymor Cray pithily put it, “nothing beats a fast clock”. But this work did help to kickstart my interest and background in processor architecture design
Stanford Graduate Level EE Courses: I took four or five graduate level courses at Stanford (mainly focusing on communications) while working at GTE. The SITN (Stanford Instructional Television Network) had just been put in place and companies all over the valley had microwave receivers on their rooftops to receive the Stanford broadcasts. I tried to attend the lectures in person whenever time permitted.
Learning to Rootkit: One of the Stanford courses required the student to define and execute a project relating to processor architecture. I leveraged the assets available to me at GTE, my experience with the Intel 8080 Microprocessor Development System (MDS), and my relationships with some of the FAEs at Intel. I wrote a simple direct rootkit that emulated the microprocessor itself – so that the system could be directly booted by the boot loader into the rootkit, and then the MDS OS itself booted on top of that (both the rootkit and the OS were stored on 5 ¼” floppies). Interesting program binaries could then be executed (effectively interpreted) on top of the 8080 emulator – enabling straightforward profiling of program behavior such as instruction type execution frequencies, etc. This work was to presage some of my later work – this rootkit experience was to give me an appreciation for cyber security issues that were later to surface in the Motegrity work at Tallwood Venture Capital, and the profiling of code execution behavior (instruction frequencies, etc) was a fundamental methodology I was to again see at Berkeley for the iterative refinement and development of the Smalltalk on a RISC (SOAR) processor under Prof David Patterson, where I was the principal micro-architect, see: UC-BERKELEY
SOME TAKEAWAYS:
- If your company offers education benefits at a great university like Stanford. Find the time to do it.
- If your company offers the opportunity to engage with international customers and/or travel to sell the product – take advantage of it – especially if this is your first post college work experience.
- If our company, in an effort to retain you, offers you a 6-week sabbatical after only 3 years – take advantage of that too. I went bicycle touring in Europe – but I went solo (I don’t recommend going solo).
MEMORIES:
Big System Integration Hot Seat: Big systems, with lots of boxes built by different engineers were integrated in large rooms and tested before shipping to a site or deploying on a ship or aircraft. Upon entering the integration room for the system the RIC was in, you were confronted with a life sized cutout figure of a police officer pointing. You just hoped the officer was not pointing at your box that day.
An Old Wive’s Tale from an Old Crow?: While integrating big systems that mixed RF and digital at the Lab, you inevitably met some to the old timers. They were fun to talk to and you learned a lot. They were usually RF types that belonged to the Association of Old Crows (EW – Electronic Warfare, etc) who would get together regularly for “conferences” that required fairly high security clearance to attend. One of those Old Crows told me a story about working on a site on the DEW line. The DEW (Distant Early Warning) was the chain of powerful radar stations located in the far north during the cold war. He described young soldiers being sent out for picket duty in the middle of the night in the polar winter – and I asked “how the heck did they stay warm” – to which he replied – “oh no problem, whenever they needed to warm up they just went and stood in front of the dish”.
Dropping Tasks and Midnight System Recompiles: During initial installation testing of the RIC at the site in Europe the system started having problems, and I began to see “dropped task” error messages issued by the real-time executive. The executive kept a queue of tasks to run, and if the queue overflowed it would simply drop any new task and issue an error message. When the system was integrated and tested back in Mountain View, we simply couldn’t connect EVERYTHING, but once we got to the site and every last thing was plugged in, the workload became too high. One way to “debug” what was happening was to attach probes to the upper 12-bits of the 8080’s 16-bit address bus (those were the days . . .). Put the lower 6-bits into a D/A and feed that into the X control of an oscilloscope, and then the next 6-bits into the Y control. Hence the scope beam would jump around the display showing where the program was executing (yes this was in the days before caches – every instruction fetch went to main memory). What you wanted to see was a bright spot on the scope at the executive idle loop XY location which indicated the system was spending a lot of time in the executive idle loop and (hopefully) the processor utilization was 50% or less. In my situation, you could barely see the idle loop code location in memory space – which was a bad sign. One of the main sources of load on the processor was command echo receipt and verification. Every command sent out to a receiving box was echoed back to the RIC and verified. I had no choice but to disable much of this reliability/verification infrastructure. I still remember recompiling the entire system in the middle of the night, with the sound of the 5″ floppy disk banging away on the blue Intel Microprocessor Development System (MDS). I don’t think I ever told the site installation supervisor, Dave Leiner, of what I had done. I was just glad we had shipped an Intel MDS out to the site.
A Fine Use of TaxPayer Dollars: I recall one of the first operational uses of the system at the customer site was to acquire a geostationary TV satellite to watch the Superbowl. I think it was Superbowl XV. Kickoff time was around midnight where we were.